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MAX44007
Low-Power Digital Ambient Light Sensor
with Enhanced Sensitivity
Interrupt Status 0x00
BIT 7
—
BIT 6
—
BIT 5
—
BIT 4
—
BIT 3
—
BIT 2
—
BIT 1
—
BIT 0
INTS
REGISTER
ADDRESS
0x00
If the INTE bit is set to 1, then the INTS status bit is asserted if the light intensity exceeds either upper or lower threshold
limits (as specified by registers 0x05 and 0x06, respectively) for a period longer than that defined by the Threshold
Timer register (0x07). This bit resets to 0 after the host reads this register. See Table 2.
This bit is also reflected on the INT pin. When the INTS bit is set, the INT pin is asserted low, and when the INTS bit is
set to 0, the INT pin is pulled high by an external resistor.
Once this bit is set, it can be cleared either by reading the Interrupt Status register 0x00 or by writing a 0 to the Interrupt
Enable register 0x01.
Table 2. Interrupt Status Register
BIT 0
0
1
OPERATION
No interrupt trigger event has occurred.
Ambient light intensity is outside the threshold window range for a longer than specified time.
Interrupt Enable 0x01
BIT 7
—
BIT 6
—
BIT 5
—
BIT 4
—
BIT 3
—
BIT 2
—
BIT 1
—
BIT 0
INTE
REGISTER
ADDRESS
0x01
Interrupt events set the INTS bit (register 0x00, bit 0) and the INT pin only if the INTE bit is set to 1. If the INTE bit is set
(interrupt is enabled) and the interrupt condition is triggered, then the INT pin is pulled low (asserted) and the INTS bit
in the Interrupt Status register is set to 1. See Table 3.
Table 3. Interrupt Enable Register
BIT 0
0
1
OPERATION
The INT pin and the INTS bit are not asserted even if an interrupt event has occurred.
Detection of an interrupt event triggers a hardware interrupt ( INT pin is pulled low) and sets the INTS bit
(register 0x00, bit 0).
Configuration 0x02
BIT 7
CONT
BIT 6
MANUAL
BIT 5
—
BIT 4
—
BIT 3
CDR
BIT 2
BIT 1
TIM[2:0]
BIT 0
REGISTER
ADDRESS
0x02
8
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